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L9333
QUAD LOW SIDE DRIVER
s
s
s
s
s s
s
s s s
s
WIDE OPERATING SUPPLY VOLTAGE RANGE FROM 4.5V UP TO 32V FOR TRANSIENT 45V VERY LOW STANDBY QUIESCENT CURRENT TYPICALLY < 2A INPUT TO OUTPUT SIGNAL TRANSFER FUNCTION PROGRAMMABLE HIGH SIGNAL RANGE FROM -14V UP TO 45V FOR ALL INPUTS 3.3V CMOS COMPATIBLE INPUTS DEFINED OUTPUT OFF STATE FOR OPEN INPUTS FOUR OPEN DRAIN DMOS OUTPUTS, WITH RDSon = 1.5 FOR VS > 6V AT 25C OUTPUT CURRENT LIMITATION CONTROLLED OUTPUT SLOPE FOR LOW EMI OVERTEMPERATURE PROTECTION FOR EACH CHANNEL INTEGRATED OUTPUT CLAMPING FOR FAST INDUCTIVE RECIRCULATION VFB > 45V
MULTIPOWER BCD TECHNOLOGY
SO20 (12+4+4)
DIE
ORDERING NUMBERS: L9333MD (SO20 12+4+4) L9333DIE1 (DIE)
s
STATUS MONITORING FOR - OVERTEMPERATURE - DISCONNECTED GROUND OR SUPPLY VOLTAGE
DESCRIPTION The L9333 is a monolithic integrated quad low side driver. It is intended to drive lines, lamps or relais in automotive or industrial applications.
BLOCK DIAGRAM
IN 4
CHANNEL 4 VS
R IN
OU T 4
OU T 1 = &
IN 1
PR G TH ER MA L S H U TD O WN
C H A N N E L1
4 R IN PR G D IA G N O S TIC LO G IC D IAG
R EN EN
VS G ND
REF ERE NCE
V int V lo g ic
March 2001
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L9333
PIN CONNECTION (Top view)
IN1 IN2 DIAG GND GND GND GND VS IN3 IN4
1 2 3
20 19 18
PRG OUT1 OUT2 GND GND GND GND OUT3 OUT4 EN
4 5 6 7 8 9 10
So 12+4+4 Med. Power
17 16 15 14 13 12 11
PIN FUNCTION
Pin N 1 2 3 4, 5, 6, 7, 14, 15, 16, 17 8 9 10 11 12 13 18 19 20 Pin Name IN 1 IN 2 DIAG GND Input 1 Input 2 Diagnostic Ground Description
VS IN 3 IN 4 EN OUT4 OUT 3 OUT 2 OUT 1 PRG
Supply Voltage Input 3 Input 4 Enable OUTPUT4 OUTPUT 3 OUTPUT 2 OUTPUT 1 Programming
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L9333
ABSOLUTE MAXIMUM RATINGS
Symbol VS dVS/dt VIN, VEN, VPRG VOUT VDIAG Parameter Supply voltage DC Supply voltage Pulse (T = 400ms) Supply voltage transient Input, Enable, Programming Pin voltage Output voltage Diagnostic output voltage Value -0.3 to 32 -0.3 to 45 -10 to +10 -14 to 45 Unit V V V/s V
-0.3 to 45 1) -0.3 to 45
V V
Note 1) : In flyback phase the output voltage can reach 60V.
ESD - PROTECTION
Parameter Supply pins and signal pins Output pins Value against GND 2 4 Unit KV KV
Note: Human-Body-Model according to MIL 883C. The device widthstand ST1 class level.
THERMAL DATA
Symbol TJSD TJSDhys SO 12+4+4 Rth (j-p) Rth (j-a) Thermal resistance junction to pins Thermal resistance junction to ambient 2) 15 50 C/W C/W Parameter Temperature shutdown threshold Temperature shutdown hysteresis Min 175 20 Typ Max 220 Unit C K
Note 2) : With 6cm2 on board heat sink area.
LIFE TIME
Symbol tB tb Parameter useful life time operating life time Condition VS 14V EN = low 4.5V VS 32V EN = high Value 20 5000 Unit years hours
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L9333
OPERATING RANGE: Within the operating range the IC operates as described in the circuit description, including the diagnostic table.
Symbol VS VIN, VEN, VPRG VOUT VDIAG TJ Parameter Supply voltage Input voltage Condition Min 4.5 -14 Max 32 45 Unit V V
Output voltage Diagnostic output voltage Junction temperature
Voltage will be limited by internal ZDiode clamping
-0.3 -0.3 -40
60 45 150
V V C
ELECTRICAL CHARACTERISTCS The electrical characteristics are valid within the defined Operating Conditions, unless otherwise specified. The function is guaranteed by design until TJSDon switch-on-threshold.
Symbol SUPPLY IQ Quiescent current VS 14V; VEN 0.3V Tamb 85 C VS 14V; VEN 0.3V Ta 150C VS 14V; EN = high, Output = off EN = high, Output = on Inputs, IN1 - IN4; Programming, PRG VINlow VINhigh IIN RIN Input voltage LOW Input voltage HIGH Input current Input impedance 0V VIN 45V 3) V IN < 0V; VIN > VS -14 2 -25 10 60 1 45 50 V V A k 1 <2 10 A Parameter Test Condition Min. Typ. Max. Unit
50 2 3.5
A mA mA
Note 3) : Current direction depends on the programming setting (PRG=high leads into a positive current see also Blockdiagram page 1)
Enable EN VENlow VENhigh REN IEN Input voltage LOW Input voltage HIGH Input impedance Input current -14V < VEN < 1.5V 1.5V < VEN < 45V -14 2 5 5 80 1 45 V V k A
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L9333
ELECTRICAL CHARACTERISTCS (continued)
Symbol Parameter Test Condition Min. Typ. Max. Unit
Outputs OUT1- OUT4 RDSon IOLeak Output ON-resistor Leakage current VS > 6V, IO = 0.3A VO = VS = 14V; Ta < 125C VO = VS = 14V; Ta < 150C VOClamp IOSC CO Output voltage during clamping Short-circuit current internal output capacities EFB 2mJ; 10 mA < IO < 0.3A VS > 6V VO > 4.5V 45 400 52 700 1.7 1 3.8 5 25 60 1000 100 A A V mA pF
Diagnostic Output DIAG VDlow IDmax IDLeak Output voltage LOW Max. output current Leakage current IDL = 0.6mA internal current limitation; VD = 14V V D = VS = 14 V; Ta < 125 C VD = VS = 14 V; Ta < 150 C Timing Characteristics 4) td,on td,off tset td,DIAG Sout On delay time Off delay time Enable settling time ON or OFF Diagnostic delay time Output voltage slopes VS = 14V Cext = 0F; Lext = 0H only testing condition 10mA I0 200mA 2.5 9 2 3 3.5 4.5 20 10 16 s s s s V/s 1 5 0.1 0.8 15 1 5 V mA A A
Note : All parameters are measured at 125C. Note 4) : See also Fig.3 Timing Characteristics
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L9333
Figure 1. Timing Characteristics
VE N
Active
VPR G t
Non-Inverting Mode
Inverting Mode
t
V IN
t
V OUT VS 0.8 V S
5)
0.2 V S
t
t set
t d,off
t d,on
t set
Note 5) : Output voltage slope not controlled for enable low!
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L9333
FUNCTIONAL DESCRIPTION The L9333 is a quad low side driver for lines, lamps or inductive loads in automotive and industrial applications. The logic input levels are 3.3V CMOS compatible. This allows the device to be driven directly by a microcontroller. For the noise immunity, all input thresholds have a hysteresis of typ. 100mV. Each input (IN, EN and PRG) is protected to withstand voltages from -14V to 45V. The device is activated with a 'high' signal on ENable. ENable 'low' switches the device into the sleep mode. In this mode the quiescent current is typically less than 2A. A high signal on PRoGramming input changes the signal transfer polarity from noninverting to the inverting mode. This pin can be connected either to VS or GND. If these pins are not connected, the forced status of the PRG and EN pin is low. For packaged applications it is still recommended to connect all input pins to ground respective VS to avoid EMC influence. The forced condition leads to a mode change if the PRG pin was high before the interruption. Independent of the PRoGramming input, the OUTput switches off, if the signal INput pin is not connected. This function is verified using a leakage current of 5A (sink for PRG=high; source for PRG=low) during circuit test. Each output driver has a current limitation of min 0.4A and an independent thermal shut-down. The thermal shut-down deactivates that output, which exceeds temperature switch off level. When the junction temperature decreases 20K below this temperature threshold the output will be activated again. This 20K is the hysteresis of the thermal shutdown function. The Gates, of the output DMOS transistors are charged and discharged with a current source. Therefore the output slope is limited. This reduces the electromagnetic radiation. For inductive loads an output voltage clamp of typically 52V is implemented. The DIAGnostic is an open drain output. The logic status depends on the PRoGramming pin. If the PRG pin is 'low' the DIAG output becomes low, if the device works correctly. At thermal shut-down of one channel or if the ground is disconnected the DIAGnostic output becomes high. If the PRG pin is 'high' this output is switched off at normal function and switched on at overtemperature. For the fault condition of interrupted ground, the potential of VS and Diagnostic should be equal.
DIAGNOSTIC TABLE
Pins Normal function EN H H H H L Overtemperature, disconnected ground or supply voltage Overtemperature H PRG L L H H X L IN L H L H X X OUT L (on) H (off) H (off) L (on) H (off) H (off) * DIAG L (on) L (on) H (off) H (off) H (off) H (off)
H
H
X
H(off) *
L(on)
X = not relevant * selective for each channel at overtemperature
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L9333
Figure 2. Application for Inverting Transfer Polarity
BOARD VOLTAGE 14 V VCC = 5V or 3.3V 33F
VCC MICROCONTROLLER
INT Adressdecoder
PRG EN
VS DIAG
M
2W 12 mH 250 mA 240
VCC = 5V
A 0:8 D0 D1 D2 D3
8
L9333
IN 1 IN 2 IN 3 IN 4 OUT 1 OUT 2 OUT 3 OUT 4 GND
VCC IN
50 kHz
10H 50pF
GND
GND
Figure 3. Application for non Inverting Transfer Polarity
BOARD VOLTAGE 14 V
33F
PRG EN
VS DIAG
M
2W 12 mH 250 mA
VCC = 5V
L9333
IN 1 IN 2 IN 3 IN 4 OUT 1 OUT 2 OUT 3 OUT 4
240 IN 10H 50pF
VCC
GND
GND
Note We recommend to use the device for driving inductive loads with flyback energy EFB 2mJ.
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L9333
EMC SPECIFICATION EMS (electromagnetic susceptibility) Measurement setup: DUT mounted on a specific application board is driven in a typical application circuit (see below). Two devices are stimulated by a generator to read and write bus signals. They will be monitored externally to ensure proper function. Measurement method: a) b) c) The two bus lines are transferred 2m under a terminated stripline. That's where they were exposed to the RF-field. Stripline setup and measurement method is described in DIN 40839-4 or ISO 11452-5. DUT mounted on the same application board is exposed to RF through the tophole of a TEM-cell. Measurement method according SAE J1752. The two bus lines are transferred into a BCI current injection probe. Setup and measurement method is described in ISO 11452-4.
Failure criteria: Failure monitoring is done by envelope measurement of the logic signals with a LeCroy oscilloscope with acceptance levels of 20% in amplitude and 2% time. Limits: The device is measured within the described setup and limits without fail function. The Electromagnetic Susceptivity is not tested in production. a) Field strength under stripline of > 250V/m in the frequency range 1 - 400MHz modulation:AM 1kHz 80%. b) Field strength in TEM-cell of > 500V/m in the frequency range 1 - 400MHz modulation: c) RF-currents with BCI of > 100mA in the frequency range 1 - 400MHz modulation: Measured Circuit The EMS of the device was verified in the below described setup. AM 1kHz 80%. AM 1kHz 80%.
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9
7 8 13
1
14
11
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L9333
Figure 4.
ANECHOIC CHAMBER
2m Flat cable Stripline SMBYW01-200 1 Jumper 11
125Hz 16
f
2 33F 10k 10k SM6T39A 10nF 20k 4 100 optional
17
250Hz
f
2
4.7nF
4.7nF
4
500Hz
U(t)
f VS 4 10k IN1 IN2 IN3 IN4 GND OUT1 EN PRG DIAG 14V 17 4 5 9 16 Jumper 19 14 13
2
5
1kHz
+
-
L9333
OUT2 OUT3 OUT4
8 7
4 4.7n
4.7nF
4 1nF optional
L9333
mm DIM. MIN. A A1 B C D E e H h L K 10 0.25 0.4 2.35 0.1 0.33 0.23 12.6 7.4 1.27 10.65 0.75 1.27 0.394 0.010 0.016 TYP. MAX. 2.65 0.3 0.51 0.32 13 7.6 MIN. 0.093 0.004 0.013 0.009 0.496 0.291
inch TYP. MAX. 0.104 0.012 0.020 0.013 0.512 0.299 0.050 0.419 0.030 0.050
OUTLINE AND MECHANICAL DATA
SO20 (12+4+4)
0 (min.)8 (max.)
L
h x 45
A B e K H D A1 C
20
11 E
1
0 1
SO20MEC
PAD
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L9333
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (R) 2001 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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